Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : dti_flop_asyn_soffa_top
SCORELINECONDTOGGLEFSMBRANCHASSERT
32.14 32.14

Source File(s) :
/nfs_project/gemini/DV/mahmood/all_tests_main/gemini/design/mem_ss/../ip/dti/libs/dti_tm16_phy/hdl/library/dti_tm16ffc_16f96_9t_stdcells_rev1p0p0_pwr.v

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst37.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst38.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst39.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst51.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst53.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst56.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst60.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst61.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst65.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst71.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst78.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst84.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst85.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst96.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst100.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst103.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst137.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst142.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst144.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst150.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst151.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst166.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst173.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst190.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst204.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst213.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst239.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst244.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst250.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst282.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst287.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst289.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst293.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst305.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst319.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst322.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst363.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst399.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst404.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst408.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst415.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst425.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst439.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst446.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst455.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst471.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst482.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst494.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst499.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst515.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst567.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst569.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst573.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst574.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst577.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst580.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst597.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst605.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst623.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst636.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst648.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst679.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst681.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst686.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst688.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst699.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst716.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst721.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst738.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst740.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst745.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst753.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst754.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst757.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst760.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst763.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst767.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst785.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst794.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst802.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst803.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst804.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst819.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst821.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst842.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst848.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst850.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst855.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst870.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst871.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst884.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst887.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst890.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst894.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst901.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst939.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst941.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst948.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst958.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst970.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst974.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst984.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1000.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1016.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1019.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1036.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1056.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1058.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1085.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1098.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1110.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1121.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1139.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1165.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1168.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1176.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1193.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1205.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1215.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1224.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1225.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1240.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1279.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1289.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1298.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1327.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1348.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1357.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1369.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1384.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1398.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1434.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1449.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1458.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1460.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1484.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1505.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1507.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1508.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1512.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1521.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1522.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1554.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1560.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1570.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1573.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1592.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1605.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1624.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1635.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1645.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1658.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1667.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1670.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1685.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1695.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1701.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1705.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1719.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1727.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1730.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1747.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1776.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1777.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1786.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1815.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1824.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1826.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1828.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1836.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1837.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1844.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1849.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1853.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1857.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1876.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1878.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1885.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1892.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1901.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1914.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1916.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1948.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1953.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1957.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1971.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1984.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1988.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1989.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2008.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2016.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2017.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2039.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2053.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2054.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2075.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2078.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2090.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2104.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2105.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2112.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2134.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2172.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2206.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2249.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2250.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2256.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2293.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2297.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2299.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2315.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2330.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2357.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2383.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2385.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2409.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2415.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2427.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2446.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2447.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2454.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2470.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2473.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2493.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2498.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2501.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2508.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2513.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2518.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2532.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2591.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2597.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2606.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2624.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2627.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2644.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2662.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2675.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2702.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2724.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2745.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2751.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2758.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2766.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2778.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2798.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2812.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2827.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2834.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2873.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2877.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2882.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2884.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2897.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2899.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2901.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2911.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2927.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2933.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2950.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2956.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2961.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2962.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2965.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2979.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2982.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2987.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2989.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3010.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3016.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3031.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3033.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3036.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3053.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3056.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3062.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3075.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3078.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3079.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3094.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3095.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3096.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3098.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3102.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3114.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3118.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3122.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3128.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3142.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3147.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3155.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3167.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3180.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3183.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3193.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3195.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3196.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3202.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3203.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3212.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3231.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3237.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3243.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3264.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3265.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3272.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3278.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3290.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3295.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3326.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3327.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3331.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3345.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3380.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3385.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3390.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3393.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3398.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3403.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3423.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3446.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3448.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3452.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3458.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3487.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3489.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3493.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3498.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3513.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3515.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3524.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3533.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3548.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3560.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3584.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3586.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3614.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3619.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3623.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3634.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3647.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3672.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3688.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3695.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3699.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3700.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3707.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3727.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3735.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3736.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3737.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3739.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3740.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3743.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3767.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3771.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3779.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3807.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3826.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3836.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3845.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3854.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3884.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3907.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3911.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3960.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3984.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3989.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3990.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3992.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4002.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4004.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4015.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4030.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4043.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4044.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4053.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4064.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4084.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4094.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4117.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4143.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4148.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4156.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4168.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4193.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4204.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4207.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4210.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4223.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4224.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4225.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4230.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4239.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4243.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4245.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4254.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4256.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4287.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4298.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4331.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4332.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4335.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4341.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4347.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4350.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4360.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4363.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4373.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4376.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4379.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4381.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4394.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4413.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4422.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4423.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4438.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4447.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4449.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4450.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4461.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4490.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4498.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4521.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4568.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4577.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4593.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4595.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4603.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4617.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4622.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4623.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4626.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4637.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4648.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4652.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4655.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4678.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4680.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4682.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4688.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4697.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4720.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4721.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4728.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4732.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4753.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4754.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4758.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4779.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4825.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4841.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4847.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4862.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4873.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4906.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4907.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4925.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4942.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4947.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4966.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4968.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4974.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4989.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4992.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4997.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5015.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5017.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5020.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5022.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5027.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5031.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5050.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5066.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5078.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5108.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5140.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5160.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5168.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5190.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5208.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5216.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5221.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5224.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5238.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5250.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5292.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5295.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5299.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5303.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5308.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5313.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5320.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5322.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5350.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5357.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5376.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5395.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5402.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5410.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5417.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5419.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5427.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5435.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5440.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5442.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5474.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5484.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5501.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5520.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5526.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5538.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5549.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5557.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5569.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5570.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5587.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5588.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5593.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5598.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5601.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5604.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5614.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5618.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5619.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5629.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5636.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5645.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5652.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5663.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5668.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5671.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5683.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5691.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5695.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5727.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5734.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5739.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5749.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5757.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5762.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5772.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5798.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5801.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5822.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5823.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5843.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5847.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5856.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5857.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5870.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5875.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5890.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5920.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5921.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5922.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5938.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5939.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5967.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5968.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5978.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5984.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5997.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6000.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6014.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6023.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6027.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6033.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6043.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6050.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6064.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6071.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6074.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6078.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6089.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6092.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6104.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6111.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6117.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6128.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6137.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6149.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6160.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6163.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6169.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6188.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6218.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6224.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6225.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6230.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6232.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6240.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6247.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6250.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6257.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6278.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6282.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6299.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6329.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6345.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6360.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6362.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6363.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6390.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6407.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6427.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6433.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6440.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6483.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6484.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6490.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6491.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6493.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6494.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6503.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6516.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6524.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6526.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6532.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6557.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6577.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6595.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6596.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6605.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6612.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6615.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6622.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6623.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6637.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6655.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6663.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6690.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6691.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6693.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6699.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6712.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6720.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6731.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6749.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6750.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6753.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6774.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6779.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6781.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6785.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6786.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6818.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6819.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6827.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6864.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6879.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6883.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6885.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6888.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6889.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6891.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6892.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6936.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6942.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6952.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6982.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6983.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6984.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6997.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7006.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7026.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7036.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7037.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7041.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7052.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7078.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7081.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7097.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7119.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7121.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7135.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7142.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7149.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7150.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7151.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7157.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7159.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7201.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7209.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7212.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7217.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7235.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7236.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7266.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7306.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7310.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7322.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7326.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7330.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7345.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7346.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7352.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7385.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7402.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7407.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7409.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7417.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7474.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7489.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7501.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7515.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7556.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7565.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7566.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7570.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7590.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7602.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7611.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7619.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7623.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7635.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7642.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7649.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7667.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7672.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7680.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7686.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7689.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7691.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7693.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7695.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7696.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7705.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7728.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7741.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7749.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7776.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7850.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7857.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7858.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7877.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7884.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7891.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7899.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7907.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7931.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7935.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7946.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7948.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7949.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7952.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7960.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7963.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7980.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7994.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8012.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8019.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8023.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8031.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8036.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8053.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8058.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8062.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8063.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8067.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8092.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8093.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8102.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8103.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8104.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8137.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8143.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8151.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8156.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8168.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8173.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8190.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8202.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8210.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8214.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8225.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8247.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8265.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8318.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8323.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8338.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8360.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8383.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8391.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8393.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8400.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8401.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8405.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8410.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8420.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8421.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8466.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8476.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8481.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8487.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8498.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8508.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8543.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8549.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8577.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8616.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8617.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8635.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8650.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8662.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8673.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8680.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8681.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8683.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8699.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8710.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8718.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8724.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8727.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8734.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8735.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8748.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8775.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8777.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8786.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8792.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8811.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8817.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8826.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8855.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8856.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8857.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8862.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8868.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8880.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8882.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8884.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8895.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8901.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8904.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8914.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8916.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8921.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8927.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8929.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8930.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8963.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8982.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9001.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9012.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9022.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9037.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9041.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9054.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9089.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9100.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9119.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9128.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9166.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9172.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9174.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9202.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9204.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9229.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9272.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9276.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9278.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9305.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9346.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9347.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9354.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9355.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9358.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9383.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9397.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9454.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9470.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9487.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9493.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9505.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9518.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9525.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9528.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9533.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9545.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9561.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9570.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9585.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9586.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9595.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9619.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9645.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9650.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9653.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9663.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9676.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9690.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9699.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9720.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9727.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9730.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9731.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9750.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9753.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9763.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9767.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9780.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9788.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9800.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9819.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9851.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9855.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9857.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9862.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9866.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9876.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9895.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9899.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9905.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9908.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9931.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9945.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9956.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9957.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9959.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9962.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9963.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9975.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9976.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9978.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9982.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9987.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9988.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9990.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10017.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10051.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10060.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10066.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10078.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10082.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10091.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10092.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10121.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10124.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10127.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10137.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10192.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10193.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10243.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10249.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10276.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10279.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10284.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10287.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10302.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10324.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10330.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10356.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10370.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10376.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10388.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10408.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10409.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10420.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10428.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10431.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10434.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10439.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10440.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10448.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10457.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10475.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10487.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10491.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10513.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10552.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10576.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10601.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10611.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10616.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10627.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10658.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10671.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10679.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10732.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10745.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10748.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10749.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10751.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10755.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10758.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10771.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10772.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10778.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10788.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10795.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10796.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10808.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10821.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10833.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10838.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10843.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10848.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10862.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10864.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10886.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10897.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10908.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10914.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10916.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10935.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10936.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10945.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10988.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11013.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11023.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11027.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11036.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11043.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11044.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11053.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11060.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11069.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11071.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11074.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11084.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11085.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11098.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11100.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11134.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11140.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11162.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11173.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11181.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11183.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11217.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11219.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11225.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11230.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11232.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11248.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11256.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11272.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11281.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11291.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11312.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11316.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11342.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11343.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11348.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11358.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11367.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11378.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11391.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11401.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11406.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11410.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11413.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11427.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11436.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11455.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11476.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11521.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11532.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11538.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11540.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11545.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11548.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11550.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11561.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11584.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11594.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11604.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11616.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11648.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11671.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11680.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11717.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11737.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11751.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11755.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11785.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11793.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11805.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11812.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11821.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11827.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11830.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11849.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11850.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11855.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11856.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11866.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11867.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11881.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11891.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11901.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11911.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11912.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11917.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11930.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11940.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11957.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11969.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11982.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11987.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11993.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11998.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12010.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12017.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12028.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12036.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12038.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12039.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12041.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12043.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12045.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12050.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12052.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12057.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12061.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12118.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12129.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12137.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12138.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12142.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12144.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12149.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12156.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12162.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12176.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12196.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12202.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12204.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12205.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12225.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12228.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12230.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12234.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12239.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12243.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12251.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12255.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12272.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12352.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12354.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12371.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12404.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12407.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12408.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12412.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12435.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12436.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12458.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12459.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12464.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12469.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12474.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12493.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12517.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12520.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12524.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12546.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12557.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12562.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12563.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12569.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12577.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12592.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12613.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12617.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12627.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12629.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12661.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12663.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12695.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12702.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12706.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12732.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12786.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12793.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12797.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12798.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12799.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12807.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12816.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12825.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12827.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12829.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12832.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12842.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12855.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12856.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12859.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12871.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12880.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12893.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12895.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12896.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12899.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12917.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12927.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12939.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12953.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12956.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12965.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13007.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13015.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13022.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13043.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13058.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13062.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13066.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13075.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13110.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13124.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13151.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13163.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13168.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13176.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13181.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13192.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13200.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13202.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13204.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13240.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13257.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13276.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13278.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13289.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13292.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13295.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13298.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13299.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13303.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13315.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13385.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13388.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13393.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13402.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13411.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13435.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13457.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13490.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13498.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13506.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13510.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13513.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13515.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13523.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13533.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13549.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13559.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13567.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13575.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13583.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13591.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13606.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13612.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13623.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13655.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13665.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13680.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13681.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13702.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13727.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13736.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13737.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13738.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13744.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13748.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13765.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13776.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13777.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13799.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13816.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13819.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13841.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13858.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13863.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13864.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13866.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13876.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13887.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13892.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13895.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13920.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13934.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13947.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13949.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13961.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13979.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13989.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13992.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14003.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14016.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14019.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14023.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14027.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14036.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14044.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14060.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14089.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14096.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14113.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14125.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14133.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14152.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14160.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14210.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14220.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14239.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14240.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14241.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14256.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14280.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14282.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14290.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14292.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14308.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14317.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14319.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14324.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14326.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14332.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14333.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14335.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14339.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14352.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14395.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14397.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14423.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14476.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14482.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14489.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14503.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14518.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14520.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14566.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14570.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14595.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14596.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14598.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14622.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14623.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14634.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14642.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14648.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14650.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14684.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14690.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14702.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14716.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14724.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14726.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14743.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14747.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14758.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14763.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14769.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14774.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14778.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14781.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14791.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14798.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14800.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14805.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14809.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14820.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14828.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14834.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14836.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14855.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14873.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14879.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14884.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14891.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14895.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14909.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14920.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14945.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14980.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14982.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14983.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14992.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14995.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15003.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15021.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15028.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15042.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15045.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15054.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15076.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15078.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15082.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15088.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15093.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15098.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15162.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15172.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15178.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15186.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15200.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15202.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15227.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15238.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15244.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15249.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15271.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15272.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15281.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15308.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15319.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15339.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15343.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15352.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15354.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15360.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15382.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15383.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15390.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15434.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15440.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15442.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15446.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15462.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15482.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15484.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15491.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15507.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15508.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15516.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15517.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15528.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15558.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15559.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15591.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15608.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15609.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15613.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15615.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15621.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15635.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15646.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15652.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15667.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15674.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15678.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15691.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15710.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15712.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15757.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15771.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15774.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15778.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15794.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15798.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15804.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15807.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15812.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15814.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15823.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15827.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15849.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15861.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15872.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15876.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15884.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15930.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15953.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15963.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15977.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16008.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16019.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16022.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16050.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16070.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16084.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16087.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16092.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16096.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16110.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16111.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16124.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16144.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16145.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16156.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16172.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16179.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16183.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16199.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16202.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16205.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16213.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16215.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16226.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16228.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16234.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16248.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16281.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16283.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16295.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16302.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16348.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16379.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16398.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16412.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16428.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16435.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16453.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16462.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16467.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16498.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16501.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16520.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16522.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16533.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16544.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16545.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16565.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16570.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16588.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16596.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16622.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16623.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16626.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16635.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16644.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16663.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16666.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16667.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16677.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16746.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16753.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16761.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16762.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16808.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16816.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16818.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16828.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16834.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16836.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16838.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16846.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16849.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16859.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16882.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16889.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16899.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16936.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16949.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16959.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16962.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16970.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16972.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16983.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16989.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16994.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16996.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17000.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17010.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17026.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17053.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17058.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17059.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17061.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17071.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17086.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17098.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17103.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17105.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17109.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17126.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17135.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17142.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17143.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17148.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17155.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17156.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17178.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17179.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17214.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17224.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17230.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17231.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17234.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17278.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17312.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17325.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17357.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17368.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17421.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17431.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17450.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17459.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17490.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17515.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17523.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17538.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17566.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17573.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17595.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17604.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17640.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17654.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17659.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17684.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17688.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17708.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17723.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17730.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17749.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17760.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17772.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17790.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17804.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17833.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17835.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17837.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17842.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17845.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17847.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17857.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17863.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17864.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17876.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17877.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17885.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17894.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17918.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17920.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17923.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17925.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17946.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17947.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17958.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17960.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17968.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17969.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17972.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17976.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17983.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17984.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18001.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18022.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18058.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18079.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18082.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18087.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18102.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18125.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18137.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18144.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18176.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18188.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18192.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18207.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18228.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18230.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18235.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18265.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18278.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18280.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18286.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18294.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18322.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18327.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18330.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18331.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18335.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18343.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18349.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18353.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18408.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18412.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18423.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18434.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18446.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18482.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18520.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18588.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18607.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18617.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18623.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18627.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18636.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18637.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18642.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18675.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18676.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18683.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18695.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18716.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18720.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18735.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18737.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18740.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18745.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18747.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18751.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18762.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18768.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18772.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18780.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18787.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18789.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18821.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18844.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18847.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18859.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18887.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18945.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18950.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18953.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18963.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18964.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18969.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18970.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18985.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19019.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19052.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19055.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19062.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19079.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19081.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19085.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19086.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19088.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19095.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19103.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19104.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19153.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19154.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19171.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19188.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19231.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19232.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19239.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19267.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19275.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19288.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19294.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19314.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19317.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19324.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19329.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19335.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19357.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19361.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19378.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19382.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19386.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19388.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19391.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19421.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19438.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19450.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19470.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19473.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19476.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19485.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19490.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19494.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19526.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19528.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19548.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19550.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19559.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19563.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19565.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19573.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19576.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19585.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19588.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19598.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19621.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19625.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19644.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19670.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19678.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19691.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19711.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19728.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19735.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19743.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19747.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19767.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19783.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19788.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19794.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19816.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19818.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19825.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19834.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19838.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19859.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19863.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19864.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19876.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19883.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19891.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19904.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19946.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19950.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19957.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19970.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19975.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19987.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19998.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20005.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20006.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20008.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20010.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20025.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20031.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20058.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20060.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20078.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20095.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20144.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20149.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20151.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20156.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20162.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20166.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20177.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20178.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20205.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20224.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20235.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20243.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20251.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20256.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20281.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20282.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20289.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20290.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20305.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20314.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20330.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20347.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20351.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20352.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20390.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20404.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20407.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20427.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20459.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20486.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20487.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20490.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20491.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20510.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20517.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20520.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20528.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20541.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20557.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20562.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20573.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20575.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20586.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20589.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20592.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20606.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20609.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20616.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20622.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20631.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20639.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20658.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20667.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20674.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20675.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20701.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20702.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20705.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20706.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20707.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20708.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20732.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20745.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20772.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20806.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20821.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20843.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20846.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20856.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20866.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20868.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20884.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20901.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20904.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20913.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20916.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20982.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21027.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21062.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21064.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21067.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21077.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21079.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21089.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21096.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21124.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21129.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21146.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21155.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21159.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21173.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21205.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21207.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21215.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21220.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21221.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21234.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21235.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21247.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21251.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21265.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21279.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21290.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21309.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21328.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21345.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21348.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21357.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21369.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21378.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21394.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21407.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21415.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21429.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21442.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21443.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21458.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21487.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21490.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21508.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21544.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21555.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21573.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21591.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21592.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21596.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21602.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21626.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21655.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21656.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21694.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21707.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21717.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21720.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21750.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21754.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21761.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21762.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21778.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21790.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21804.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21809.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21834.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21843.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21846.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21847.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21854.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21859.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21876.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21880.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21886.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21898.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21908.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21913.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21914.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21915.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21921.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21932.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21936.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21953.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21958.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21961.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21963.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21989.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22010.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22018.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22023.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22054.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22059.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22061.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22064.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22066.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22069.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22071.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22073.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22080.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22087.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22088.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22095.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22101.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22109.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22111.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22117.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22119.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22126.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22140.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22168.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22172.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22198.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22205.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22209.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22225.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22234.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22236.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22249.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22251.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22259.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22262.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22276.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22298.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22300.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22303.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22313.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22320.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22324.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22332.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22335.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22344.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22383.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22386.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22389.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22394.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22397.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22457.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22459.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22475.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22507.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22508.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22523.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22525.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22528.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22544.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22565.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22573.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22584.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22603.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22619.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22622.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22645.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22656.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22674.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22675.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22723.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22725.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22735.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22738.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22752.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22764.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22774.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22776.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22788.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22804.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22826.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22828.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22834.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22849.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22850.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22859.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22864.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22874.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22886.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22898.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22902.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22920.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22923.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22930.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22943.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22950.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22982.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22983.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23020.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23025.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23034.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23045.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23081.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23093.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23094.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23128.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23135.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23164.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23176.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23182.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23186.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23210.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23217.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23228.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23232.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23233.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23244.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23277.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23290.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23305.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23324.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23330.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23348.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23350.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23359.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23378.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23382.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23396.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23400.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23412.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23438.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23450.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23451.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23467.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23500.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23508.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23511.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23513.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23516.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23528.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23533.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23559.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23584.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23593.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23596.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23605.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23647.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23665.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23674.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23693.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23708.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23719.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23724.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23734.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23745.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23750.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23753.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23776.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23780.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23789.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23805.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23815.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23816.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23834.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23837.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23847.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23848.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23852.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23854.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23871.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23874.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23877.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23880.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23886.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23894.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23895.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23898.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23901.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23904.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23907.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23918.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23922.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23946.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23956.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23961.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23962.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24005.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24007.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24038.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24039.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24044.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24045.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24050.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24056.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24062.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24071.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24077.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24089.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24091.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24092.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24093.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24100.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24102.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24124.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24128.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24140.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24142.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24152.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24180.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24186.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24193.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24199.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24206.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24230.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24251.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24252.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24257.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24265.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24272.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24279.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24295.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24297.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24309.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24315.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24325.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24328.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24336.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24353.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24376.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24378.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24382.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24384.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24394.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24398.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24408.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24419.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24421.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24422.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24443.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24444.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24471.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24516.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24518.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24526.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24533.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24536.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24548.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24573.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24577.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24581.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24584.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24586.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24619.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24636.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24641.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24650.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24651.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24655.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24657.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24680.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24691.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24717.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24719.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24723.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24729.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24731.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24739.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24740.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24749.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24750.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24751.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24763.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24768.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24773.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24785.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24799.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24827.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24828.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24857.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24873.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24889.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24900.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24939.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24946.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24964.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24970.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24982.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25003.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25016.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25020.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25023.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25039.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25076.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25095.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25112.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25119.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25144.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25152.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25155.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25156.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25163.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25169.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25178.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25179.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25186.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25239.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25247.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25249.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25256.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25262.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25272.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25276.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25281.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25284.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25319.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25335.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25342.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25360.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25364.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25378.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25394.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25410.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25429.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25434.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25436.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25437.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25448.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25504.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25506.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25519.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25520.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25529.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25536.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25545.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25553.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25557.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25560.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25577.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25579.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25590.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25602.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25604.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25610.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25622.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25644.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25656.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25665.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25666.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25669.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25700.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25713.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25718.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25721.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25725.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25735.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25767.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25793.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25802.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25808.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25811.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25819.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25822.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25823.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25837.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25848.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25854.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25855.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25857.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25876.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25882.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25884.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25897.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25901.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25939.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25958.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25960.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25989.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26017.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26030.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26078.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26128.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26135.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26144.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26181.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26191.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26218.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26222.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26230.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26238.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26249.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26250.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26257.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26265.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26268.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26272.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26278.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26282.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26283.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26297.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26298.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26303.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26310.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26314.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26367.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26391.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26397.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26405.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26415.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26421.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26423.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26436.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26449.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26459.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26461.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26488.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26496.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26498.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26510.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26517.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26528.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26533.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26570.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26590.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26591.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26594.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26597.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26598.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26636.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26648.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26657.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26662.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26673.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26678.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26684.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26707.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26733.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26746.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26762.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26771.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26778.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26799.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26806.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26808.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26810.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26811.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26831.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26836.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26842.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26850.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26878.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26882.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26885.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26908.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26926.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26928.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26949.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26960.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26968.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26971.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26992.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26994.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26996.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26998.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27067.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27078.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27081.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27084.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27092.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27110.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27114.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27125.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27156.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27186.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27192.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27227.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27230.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27235.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27240.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27250.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27252.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27277.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27281.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27285.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27303.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27305.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27312.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27351.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27364.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27394.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27404.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27405.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27417.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27439.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27441.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27452.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27458.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27465.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27476.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27482.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27487.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27490.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27512.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27526.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27540.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27549.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27556.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27591.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27592.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27602.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27605.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27635.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27648.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27662.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27671.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27684.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27686.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27687.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27694.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27695.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27696.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27700.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27704.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27715.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27724.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27730.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27731.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27756.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27761.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27786.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27790.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27797.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27799.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27811.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27815.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27816.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27827.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27836.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27840.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27844.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27881.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27895.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27901.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27903.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27969.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27973.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27990.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27995.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28003.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28014.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28031.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28034.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28042.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28045.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28064.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28089.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28095.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28119.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28149.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28152.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28156.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28160.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28169.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28170.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28178.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28186.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28194.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28209.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28210.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28236.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28247.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28265.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28288.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28296.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28304.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28312.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28316.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28327.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28328.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28345.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28357.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28383.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 28.57 28.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28394.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28396.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28414.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28427.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28428.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28441.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28450.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28458.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28473.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28476.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28477.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28482.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28497.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28498.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28510.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28517.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28525.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28526.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28539.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28552.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28573.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28584.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28591.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28596.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28600.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28604.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28609.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28625.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28633.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28637.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28655.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28670.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28676.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28678.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28680.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28691.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28702.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28703.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28710.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28716.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28724.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28725.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28726.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28759.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28766.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28771.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28825.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28844.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28859.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28862.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28869.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28875.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28878.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28879.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28882.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28897.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28901.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28912.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28917.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28919.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28930.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28945.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28961.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28973.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28978.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28990.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28992.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29009.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29016.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29020.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29036.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29044.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29050.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29061.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29064.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29068.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29076.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29077.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29079.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29080.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29081.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29086.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29095.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29134.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29142.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29147.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29150.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29159.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29168.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29178.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29188.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29190.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29193.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29204.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29206.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29214.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29220.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29222.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29223.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29225.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29243.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29264.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29282.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29286.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29288.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29289.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29305.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29329.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29342.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29345.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29351.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29354.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29359.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29368.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29380.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29383.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29386.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29394.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29409.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29411.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29448.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29449.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29474.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29475.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29486.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29491.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29502.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29511.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29517.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29525.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29560.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29575.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29586.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29591.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29619.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29628.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29635.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29642.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29645.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29653.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29665.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29681.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29689.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29698.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29700.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29716.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29718.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29721.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29732.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29743.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29744.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29763.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29777.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29792.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29806.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29809.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29812.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29836.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29838.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29839.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29847.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29884.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29904.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29918.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29921.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29931.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29956.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29963.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29976.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29984.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29997.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30010.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30015.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30026.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30034.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30056.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30075.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30092.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30094.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30104.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30113.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30118.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30128.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30144.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30149.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30206.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30207.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30224.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30225.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30230.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30248.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30272.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30281.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30287.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30299.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30305.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30313.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30355.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30380.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30385.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30412.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30413.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30414.xdti_16f_9t_96_soffnqbcka01.xdti_soffnqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30425.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30427.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30435.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30455.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30467.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30468.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30469.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30512.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30521.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30535.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30545.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30548.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30551.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30560.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30573.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30589.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30591.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst15.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst21.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst23.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst38.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst50.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst55.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst64.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst91.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst97.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst107.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst201.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst238.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst300.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst302.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst320.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst373.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst397.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst414.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst425.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst433.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst447.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst481.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst505.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst508.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst597.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst611.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst653.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst720.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst754.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst759.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst776.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst796.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst837.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst862.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst870.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst874.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst964.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst988.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1002.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1037.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 10.71 10.71
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1089.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1090.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1151.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1170.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1236.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1290.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1445.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1484.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1501.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1517.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1521.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1534.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1575.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1616.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1647.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1661.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1666.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1668.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1676.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1688.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1801.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1806.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1938.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1954.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1959.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2005.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2035.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2045.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2065.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2089.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2135.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2291.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2313.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2368.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2429.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2491.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2519.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2540.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2554.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2581.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2604.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2617.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2732.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2790.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2797.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2848.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2871.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2890.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2988.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2995.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2996.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3004.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3030.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3031.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3038.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3081.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3162.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3165.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3166.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3173.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3174.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3183.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3197.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3216.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3309.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3382.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3391.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3455.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3456.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3468.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3509.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3528.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3539.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3540.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3566.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3667.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3682.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3720.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3725.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3742.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3755.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3760.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3780.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3791.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3794.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3806.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3845.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3876.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3900.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3910.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3919.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3924.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3966.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3993.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4020.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4030.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4103.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4119.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4142.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4170.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4179.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4195.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4328.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4342.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4404.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4434.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4452.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4488.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4518.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4539.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4548.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4575.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4577.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4607.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4616.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4679.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4681.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4719.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4871.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4888.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4907.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4985.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5034.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5048.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5057.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5071.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5179.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5212.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5218.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5252.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5307.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5338.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5341.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5402.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5407.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5441.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5451.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5482.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5495.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5502.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5525.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5532.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5544.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5587.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5639.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5719.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5802.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5860.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5898.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5919.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5922.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5926.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5945.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5947.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5958.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5972.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5996.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6035.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6056.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6107.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6131.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6137.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6164.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6186.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6257.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6268.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6289.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6367.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6428.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6450.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6495.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6499.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6532.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6560.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6613.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6620.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6650.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6702.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6735.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6743.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6756.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6814.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6852.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6863.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6923.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6926.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6939.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6968.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7018.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7097.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7125.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7221.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7232.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7254.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7318.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7361.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7382.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7407.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7499.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7530.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7540.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7590.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7608.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7666.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7670.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7712.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7718.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7735.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7786.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7826.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7863.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7903.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7905.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7943.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8040.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8052.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8077.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8130.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8133.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8141.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8158.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8225.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8299.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8311.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8331.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8352.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8381.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8409.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8410.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8427.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8451.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8458.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8465.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8495.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8552.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8553.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8583.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8603.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8611.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8615.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8622.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8704.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8812.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8845.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8861.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8904.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8917.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8933.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8940.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8959.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8974.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8987.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9068.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9094.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9108.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9161.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9166.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9172.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9256.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9300.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9326.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9331.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9505.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9508.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9526.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9535.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9541.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9550.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9652.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9671.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9707.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9712.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9727.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9732.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9737.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9738.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9811.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9833.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9834.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9909.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9930.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9947.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9949.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9986.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10146.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10166.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10196.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10216.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10223.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10265.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10275.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10303.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10314.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10324.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10332.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10343.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10349.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10405.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10427.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10429.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10482.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10578.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10601.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10624.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10679.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10707.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10733.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10752.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10767.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10852.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10854.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10858.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10929.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10945.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10969.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10971.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10977.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10978.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10987.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10993.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11013.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11031.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11129.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11175.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11203.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11204.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11220.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11262.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11276.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11336.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11342.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11356.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11418.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11429.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11491.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11492.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11513.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11537.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11604.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11668.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11675.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11716.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11725.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11779.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11819.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11829.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11847.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11905.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11950.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11955.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11984.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12035.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12043.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12059.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12076.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12171.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12178.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12191.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12195.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12261.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12282.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12286.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12311.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12322.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12411.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12420.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12456.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12460.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12551.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12564.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12581.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12595.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12618.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12628.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12653.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12744.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12774.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12780.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12918.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12973.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12992.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13002.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13007.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13055.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13081.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13120.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13156.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13184.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13190.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13205.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13264.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13268.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13294.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13352.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13369.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13413.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13425.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13515.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13584.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13596.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13657.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13729.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst15.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst21.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst23.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst38.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst50.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst55.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst64.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst91.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst97.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst107.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst201.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst238.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst300.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst302.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst320.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst373.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst397.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst414.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst425.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst433.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst447.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst481.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst505.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst508.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst597.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst611.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst653.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst720.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst754.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst759.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst776.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst796.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst837.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst862.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst870.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst874.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst964.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst988.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1002.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1037.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 10.71 10.71
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1089.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1090.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1151.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1170.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1236.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1290.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1445.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1484.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1501.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1517.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1521.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1534.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1575.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1616.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1647.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1661.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1666.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1668.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1676.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1688.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1801.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1806.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1938.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1954.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1959.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2005.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2035.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2045.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2065.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2089.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2135.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2291.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2313.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2368.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2429.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2491.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2519.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2540.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2554.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2581.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2604.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2617.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2732.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2790.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2797.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2848.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2871.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2890.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2988.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2995.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2996.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3004.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3030.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3031.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3038.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3081.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3162.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3165.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3166.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3173.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3174.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3183.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3197.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3216.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3309.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3382.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3391.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3455.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3456.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3468.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3509.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3528.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3539.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3540.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3566.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3667.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3682.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3720.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3725.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3742.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3755.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3760.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3780.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3791.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3794.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3806.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3845.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3876.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3900.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3910.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3919.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3924.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3966.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3993.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4020.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4030.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4103.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4119.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4142.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4170.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4179.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4195.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4328.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4342.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4404.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4434.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4452.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4488.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4518.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4539.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4548.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4575.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4577.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4607.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4616.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4679.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4681.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4719.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4871.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4888.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4907.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4985.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5034.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5048.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5057.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5071.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5179.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5212.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5218.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5252.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5307.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5338.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5341.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5402.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5407.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5441.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5451.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5482.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5495.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5502.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5525.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5532.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5544.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5587.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5639.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5719.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5802.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5860.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5898.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5919.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5922.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5926.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5945.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5947.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5958.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5972.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5996.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6035.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6056.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6107.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6131.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6137.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6164.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6186.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6257.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6268.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6289.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6367.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6428.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6450.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6495.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6499.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6532.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6560.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6613.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6620.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6650.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6702.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6735.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6743.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6756.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6814.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6852.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6863.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6923.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6926.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6939.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6968.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7018.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7097.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7125.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7221.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7232.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7254.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7318.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7361.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7382.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7407.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7499.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7530.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7540.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7590.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7608.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7666.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7670.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7712.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7718.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7735.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7786.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7826.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7863.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7903.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7905.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7943.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8040.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8052.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8077.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8130.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8133.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8141.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8158.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8225.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8299.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8311.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8331.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8352.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8381.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8409.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8410.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8427.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8451.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8458.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8465.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8495.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8552.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8553.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8583.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8603.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8611.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8615.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8622.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8704.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8812.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8845.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8861.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8904.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8917.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8933.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8940.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8959.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8974.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8987.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9068.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9094.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9108.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9161.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9166.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9172.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9256.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9300.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9326.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9331.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9505.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9508.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9526.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9535.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9541.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9550.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9652.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9671.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9707.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9712.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9727.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9732.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9737.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9738.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9811.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9833.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9834.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9909.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9930.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9947.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9949.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9986.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10146.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10166.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10196.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10216.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10223.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10265.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10275.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10303.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10314.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10324.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10332.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10343.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10349.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10405.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10427.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10429.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10482.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10578.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10601.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10624.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10679.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10707.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10733.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10752.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10767.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10852.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10854.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10858.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10929.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10945.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10969.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10971.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10977.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10978.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10987.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10993.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11013.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11031.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11129.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11175.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11203.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11204.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11220.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11262.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11276.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11336.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11342.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11356.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11418.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11429.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11491.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11492.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11513.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11537.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11604.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11668.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11675.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11716.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11725.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11779.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11819.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11829.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11847.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11905.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11950.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11955.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11984.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12035.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12043.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12059.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12076.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12171.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12178.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12191.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12195.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12261.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12282.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12286.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12311.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12322.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12411.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12420.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12456.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12460.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12551.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12564.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12581.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12595.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12618.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12628.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12653.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12744.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12774.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12780.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12918.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12973.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12992.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13002.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13007.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13055.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13081.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13120.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13156.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13184.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13190.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13205.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13264.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13268.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13294.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13352.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13369.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13413.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13425.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13515.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13584.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13596.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13657.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13729.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst15.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst21.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst23.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst38.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst50.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst55.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst64.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst91.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst97.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst107.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst201.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst238.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst300.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst302.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst320.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst373.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst397.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst414.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst425.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst433.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst447.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst481.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst505.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst508.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst597.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst611.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst653.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst720.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst754.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst759.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst776.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst796.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst837.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst862.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst870.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst874.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst964.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst988.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1002.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1037.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 10.71 10.71
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1089.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1090.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1151.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1170.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1236.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1290.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1445.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1484.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1501.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1517.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1521.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1534.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1575.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1616.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1647.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1661.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1666.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1668.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1676.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1688.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1801.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1806.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1938.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1954.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1959.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2005.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2035.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2045.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2065.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2089.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2135.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2291.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2313.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2368.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2429.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2491.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2519.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2540.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2554.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2581.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2604.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2617.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2732.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2790.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2797.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2848.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2871.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2890.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2988.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2995.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2996.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3004.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3030.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3031.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3038.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3081.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3162.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3165.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3166.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3173.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3174.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3183.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3197.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3216.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3309.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3382.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3391.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3455.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3456.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3468.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3509.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3528.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3539.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3540.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3566.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3667.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3682.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3720.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3725.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3742.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3755.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3760.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3780.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3791.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3794.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3806.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3845.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3876.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3900.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3910.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3919.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3924.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3966.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3993.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4020.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4030.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4103.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4119.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4142.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4170.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4179.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4195.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4328.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4342.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4404.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4434.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4452.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4488.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4518.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4539.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4548.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4575.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4577.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4607.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4616.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4679.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4681.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4719.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4871.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4888.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4907.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4985.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5034.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5048.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5057.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5071.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5179.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5212.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5218.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5252.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5307.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5338.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5341.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5402.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5407.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5441.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5451.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5482.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5495.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5502.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5525.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5532.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5544.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5587.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5639.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5719.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5802.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5860.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5898.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5919.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5922.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5926.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5945.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5947.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5958.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5972.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5996.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6035.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6056.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6107.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6131.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6137.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6164.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6186.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6257.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6268.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6289.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6367.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6428.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6450.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6495.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6499.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6532.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6560.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6613.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6620.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6650.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6702.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6735.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6743.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6756.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6814.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6852.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6863.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6923.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6926.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6939.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6968.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7018.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7097.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7125.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7221.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7232.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7254.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7318.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7361.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7382.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7407.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7499.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7530.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7540.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7590.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7608.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7666.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7670.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7712.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7718.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7735.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7786.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7826.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7863.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7903.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7905.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7943.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8040.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8052.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8077.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8130.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8133.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8141.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8158.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8225.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8299.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8311.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8331.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8352.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8381.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8409.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8410.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8427.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8451.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8458.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8465.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8495.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8552.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8553.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8583.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8603.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8611.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8615.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8622.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8704.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8812.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8845.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8861.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8904.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8917.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8933.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8940.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8959.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8974.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8987.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9068.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9094.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9108.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9161.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9166.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9172.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9256.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9300.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9326.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9331.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9505.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9508.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9526.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9535.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9541.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9550.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9652.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9671.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9707.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9712.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9727.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9732.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9737.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9738.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9811.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9833.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9834.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9909.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9930.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9947.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9949.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9986.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10146.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10166.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10196.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10216.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10223.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10265.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10275.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10303.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10314.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10324.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10332.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10343.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10349.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10405.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10427.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10429.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10482.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10578.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10601.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10624.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10679.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10707.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10733.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10752.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10767.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10852.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10854.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10858.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10929.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10945.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10969.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10971.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10977.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10978.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10987.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10993.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11013.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11031.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11129.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11175.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11203.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11204.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11220.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11262.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11276.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11336.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11342.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11356.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11418.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11429.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11491.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11492.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11513.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11537.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11604.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11668.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11675.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11716.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11725.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11779.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11819.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11829.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11847.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11905.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11950.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11955.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11984.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12035.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12043.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12059.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12076.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12171.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12178.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12191.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12195.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12261.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12282.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12286.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12311.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12322.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12411.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12420.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12456.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12460.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12551.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12564.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12581.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12595.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12618.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12628.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12653.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12744.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12774.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12780.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12918.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12973.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12992.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13002.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13007.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13055.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13081.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13120.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13156.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13184.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13190.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13205.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13264.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13268.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13294.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13352.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13369.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13413.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13425.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13515.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13584.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13596.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13657.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13729.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst15.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst21.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst23.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst38.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst50.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst55.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst64.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst91.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst97.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst107.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst164.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst201.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst219.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst238.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst264.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst269.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst286.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst288.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst300.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst302.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst320.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst332.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst373.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst375.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst387.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst393.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst397.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst414.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst416.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst425.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst433.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst447.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst449.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst481.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst500.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst503.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst505.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst508.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst536.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst542.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst543.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst567.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst568.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst597.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst611.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst648.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst653.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst667.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst684.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst685.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst698.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst710.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst720.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst743.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst754.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst756.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst759.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst776.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst784.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst791.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst796.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst813.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst835.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst837.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst862.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst866.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst870.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst874.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst892.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst933.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst964.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst965.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst988.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1002.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1037.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1059.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1065.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1083.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 10.71 10.71
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1085.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1089.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1090.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1117.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1151.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1157.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1170.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1176.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1190.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1211.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1228.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1236.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1257.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1262.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1290.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1340.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1351.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1362.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1367.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1377.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1392.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1398.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1401.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1430.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1432.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1445.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1465.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1478.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1484.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1501.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1517.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1521.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1534.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1546.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1550.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1561.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1575.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1578.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1579.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1616.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1638.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1645.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1647.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1661.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1666.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1668.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1676.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1688.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1777.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1789.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1801.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1802.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1805.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1806.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1889.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1913.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1938.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1954.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1959.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2004.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2005.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2006.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2021.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2028.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2035.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2045.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2049.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2065.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2072.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2089.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2100.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2118.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2135.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2140.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2177.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2260.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2263.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2273.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2291.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2313.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2338.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2349.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2368.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2381.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2417.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2423.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2429.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2443.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2485.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2491.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2505.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2514.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2519.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2523.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2540.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2542.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2554.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2574.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2581.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2604.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2617.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2631.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2632.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2649.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2659.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2664.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2728.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2732.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2765.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2773.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2784.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2790.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2797.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2799.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2848.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2861.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2871.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2890.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2905.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2919.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2934.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2941.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2944.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2954.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2988.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2995.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2996.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3004.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3020.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3030.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3031.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3038.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3041.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3044.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3069.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3081.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3132.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3138.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3145.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3154.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3159.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3162.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3165.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3166.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3167.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3173.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3174.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3175.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3181.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3182.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3183.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3197.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3199.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3212.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3216.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3227.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3233.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3258.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3266.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3267.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3274.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3283.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3301.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3309.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3329.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3340.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3358.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3382.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3389.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3390.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3391.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3403.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3414.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3422.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3455.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3456.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3468.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3509.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3528.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3539.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3540.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3563.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3566.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3614.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3667.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3682.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3708.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3720.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3725.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3742.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3749.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3755.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3760.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3764.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3780.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3791.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3794.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3806.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3821.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3829.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3837.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3845.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3852.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3869.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3872.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3876.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3877.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3887.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3894.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3900.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3910.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3912.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3919.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3924.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3931.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3941.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3946.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3951.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3966.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3993.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4020.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4025.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4030.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4055.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4067.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4068.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4083.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4099.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4103.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4113.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4119.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4124.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4142.xdti_16f_9t_96_soffqa10.xdti_soffqa10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4150.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4163.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4170.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4179.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4189.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4195.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4210.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4231.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4238.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4241.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4248.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4263.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4269.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4270.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4298.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4313.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4328.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4335.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4342.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4365.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4372.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4374.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4380.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4389.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4396.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4404.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4413.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4416.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4421.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4423.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4434.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4452.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4454.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4461.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4480.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4483.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4488.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4510.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4514.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4518.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4539.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4548.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4566.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4572.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4574.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4575.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4577.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4582.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4592.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4599.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4607.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4613.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4616.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4634.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4643.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4650.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4679.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4681.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4685.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4705.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4712.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4715.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4719.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4748.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4770.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4813.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4839.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4865.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4871.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4878.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4885.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4888.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4907.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4914.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4917.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4926.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4943.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4959.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4967.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4985.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5034.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5042.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5048.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5057.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5071.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5082.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5087.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5090.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5105.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5147.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5161.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5179.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5211.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5212.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5213.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5218.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5222.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5229.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5252.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5264.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5267.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5273.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5307.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5311.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5338.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5341.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5353.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5395.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5402.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5403.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5407.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5410.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5418.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5440.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5441.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5451.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5455.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5469.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5482.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5495.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5502.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5511.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5525.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5532.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5544.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5547.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5569.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5587.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5589.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5600.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5621.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5630.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5631.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5639.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5660.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5714.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5719.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5726.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5737.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5775.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5781.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5802.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5815.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5840.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5860.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5867.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5898.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5919.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5922.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5926.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5945.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5947.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5958.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5972.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5976.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5978.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5983.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5986.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5996.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5999.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6014.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6015.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6035.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6039.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6052.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6056.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6106.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6107.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6122.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6131.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6137.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6160.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6164.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6169.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6183.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6186.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6238.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6246.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6247.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6252.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6255.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6257.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6261.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6268.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6277.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6289.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6306.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6314.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6317.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6323.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6324.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6333.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6341.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6347.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6354.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6361.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6367.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6377.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6385.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6392.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6400.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6428.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6432.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6441.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6444.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6450.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6464.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6472.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6475.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6479.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6495.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6499.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6503.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6515.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6522.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6523.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6531.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6532.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6534.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6545.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6560.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6596.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6598.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6613.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6620.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6637.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6650.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6669.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6702.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6722.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6729.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6732.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6735.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6741.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6743.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6744.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6756.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6769.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6776.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6787.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6789.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6809.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6810.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6814.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6817.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6823.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6852.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6856.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6860.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6863.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6883.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6923.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6926.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6939.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6968.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6979.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6985.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6986.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6997.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7003.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7015.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7018.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7022.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7024.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7030.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7063.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7068.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7076.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7097.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7109.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7125.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7185.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7194.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7203.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7208.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7221.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7223.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7226.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7232.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7251.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7254.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7296.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7307.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7318.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7321.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7331.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7361.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7364.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7371.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7382.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7407.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7415.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7419.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7428.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7433.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7445.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7452.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7460.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7471.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7481.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7496.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7499.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7530.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7540.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7552.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7557.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7590.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7593.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7594.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7601.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7602.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7608.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7611.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7628.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7641.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7659.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7666.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7670.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7675.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7686.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7688.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7703.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7706.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7709.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7711.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7712.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7718.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7735.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7754.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7761.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7768.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7771.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7772.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7782.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7783.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7786.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7791.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7824.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7826.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7851.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7853.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7863.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7874.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7902.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7903.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7904.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7905.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7912.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7916.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7927.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7943.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7948.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7977.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7994.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7995.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8001.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8002.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8009.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8024.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8040.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8052.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8066.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8074.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8077.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8084.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8125.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8130.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8133.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8141.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8154.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8158.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8171.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8174.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8185.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8191.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8203.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8220.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8221.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8225.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8245.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8258.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8259.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8271.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8275.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8297.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8299.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8311.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8327.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8329.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8331.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8333.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8338.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8339.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8344.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8350.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8352.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8355.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8361.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8362.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8366.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8370.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8371.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8381.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8384.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8391.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8409.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8410.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8424.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8427.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8437.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8451.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8456.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8458.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8465.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8466.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8471.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8484.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8495.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8497.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8519.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8527.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8535.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8549.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8552.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8553.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8562.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8583.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8600.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8603.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8611.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8615.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8622.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8629.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8630.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8633.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8635.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8640.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8670.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8677.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8682.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8687.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8693.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8704.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8738.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8740.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8765.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8780.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8812.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8819.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8832.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8845.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8858.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8861.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8863.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8879.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8900.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8904.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8911.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8917.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8924.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8932.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8933.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8934.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8937.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8940.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8942.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8949.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8959.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8973.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8974.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8975.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8987.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8991.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9000.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9026.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9034.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9046.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9060.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9065.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9068.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9094.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9101.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9108.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9109.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9120.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9161.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9166.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9172.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9177.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9187.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9194.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9195.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9196.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9197.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9235.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9254.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9256.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9271.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9279.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9284.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9293.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9295.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9300.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9304.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9326.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9331.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9356.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9363.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9399.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9402.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9404.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9406.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9430.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9431.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9433.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9445.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9448.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9468.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9505.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9508.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9526.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9535.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9537.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9541.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9550.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9553.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9558.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9564.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9571.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9575.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9599.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9612.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9620.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9624.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9625.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9632.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9646.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9652.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9662.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9671.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9690.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9692.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9694.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9700.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9704.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9707.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9712.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9717.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9727.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9732.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9737.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9738.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9742.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9746.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9757.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9769.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9810.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9811.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9818.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9833.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9834.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9839.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9841.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9846.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9849.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9862.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9875.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9899.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9906.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9909.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9925.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9930.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9935.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9947.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9949.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9955.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9963.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9975.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9986.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10011.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10029.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10033.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10047.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10051.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10069.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10070.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10072.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10091.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10111.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10125.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10126.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10130.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10132.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10136.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10138.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10146.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10155.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10158.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10165.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10166.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10170.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10184.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10191.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10196.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10202.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10216.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10223.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10234.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10236.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10237.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10242.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10253.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10265.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10268.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10275.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10301.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10303.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10306.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10314.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10316.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10321.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10322.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10324.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10328.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10332.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10337.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10343.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10348.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10349.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10364.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10365.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10372.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10378.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10386.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10405.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10426.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10427.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10429.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10453.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10472.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10478.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10482.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10488.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10492.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10524.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10530.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10558.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10559.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10572.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10578.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10588.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10601.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10607.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10610.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10624.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10636.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10651.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10679.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10701.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10707.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10714.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10719.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10733.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10734.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10752.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10766.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10767.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10770.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10775.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10821.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10822.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10824.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10833.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10838.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10852.xdti_16f_9t_96_sosaffqa10dh.xdti_sosaffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10854.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10858.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10865.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10882.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10890.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10893.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10897.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10903.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10910.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10918.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10921.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10922.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10923.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10924.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10929.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10933.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10945.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10951.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10969.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10971.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10974.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10977.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10978.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10981.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10984.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10987.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10993.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10996.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11002.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11010.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11011.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11012.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11013.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11029.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11031.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11033.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11035.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11073.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11088.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11096.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11114.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11115.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11116.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11120.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11123.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11129.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11131.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11145.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11146.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11148.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11157.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11175.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11184.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11200.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11203.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11204.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11208.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11220.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11232.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11233.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11253.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11262.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11270.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11274.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11276.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11286.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11291.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11310.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11318.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11325.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11336.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11342.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11346.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11352.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11356.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11359.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11370.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11387.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11406.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11418.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11426.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11429.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11437.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11452.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11462.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11466.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11476.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11491.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11492.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11501.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11509.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11511.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11513.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11537.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11571.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11580.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11581.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11582.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11585.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11603.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11604.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11606.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11609.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11618.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11621.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11654.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11657.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11668.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11672.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11673.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11675.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11677.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11713.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11716.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11721.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11725.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11731.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11750.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11752.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11761.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11773.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11779.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11786.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11787.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11792.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11819.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11829.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11830.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11841.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11844.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11847.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11871.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11872.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11881.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11893.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11905.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11908.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11909.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11913.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11928.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11929.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11930.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11940.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11944.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11950.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11952.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11955.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11961.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11966.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11980.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11981.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11984.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11991.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11999.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12007.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12008.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12035.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12043.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12046.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12047.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12048.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12049.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12051.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12054.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12059.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12064.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12076.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12093.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12102.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12107.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12115.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12123.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12133.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12141.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12171.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12178.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12191.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12195.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12198.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12201.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12215.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12216.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12242.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12249.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12261.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12282.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12286.xdti_16f_9t_96_soffqbcka01fo.xdti_soffqbcka01fo 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12287.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12288.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12289.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12292.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12311.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12320.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12322.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12323.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12330.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12337.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12341.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12345.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12366.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12373.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12374.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12388.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12409.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12411.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12420.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12424.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12436.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12438.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12442.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12451.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12456.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12460.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12463.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12477.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12483.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12494.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12502.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12512.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12529.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12534.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12538.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12539.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12544.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12547.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12551.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12564.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12568.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12576.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12579.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12581.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12595.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12603.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12618.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12627.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12628.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12635.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12638.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12642.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12643.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12647.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12653.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12656.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12664.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12669.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12674.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12683.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12697.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12730.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12736.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12744.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12747.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12758.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12759.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12763.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12774.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12779.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12780.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12793.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12795.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12803.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12814.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12817.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12829.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12830.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12831.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12833.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12840.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12842.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12868.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12870.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12873.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12881.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12886.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12888.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12896.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12915.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12918.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12936.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12937.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12938.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12942.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12953.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12955.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12964.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12966.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12973.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12988.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12992.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12998.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13002.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13004.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13005.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13007.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13013.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13018.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13021.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13032.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13037.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13038.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13040.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13055.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13079.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13080.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13081.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13086.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13097.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13103.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13108.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13120.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13127.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13139.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13143.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13148.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13153.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13156.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13165.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13180.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13184.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13187.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13190.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13192.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13205.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13209.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13240.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13244.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13260.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13264.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13266.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13268.xdti_16f_9t_96_soffqa10.xdti_soffqa10 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13280.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13285.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13294.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13304.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13334.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13338.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13344.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13349.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13352.xdti_16f_9t_96_soffqbckena10.xdti_soffqbckena10 3.57 3.57
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13362.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13369.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13412.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13413.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13418.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13425.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13439.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13447.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13450.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13457.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13463.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13470.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13473.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13475.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13479.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13480.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13486.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13488.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13489.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13496.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13506.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13509.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13515.flop.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13516.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13527.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13541.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13543.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13551.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13554.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13555.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13556.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13572.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13580.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13583.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13584.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13587.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13589.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13596.xdti_16f_9t_96_sosaffqa01dh.xdti_sosaffqa01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13617.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13620.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13646.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13657.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13660.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13661.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13687.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13689.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13697.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13718.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13722.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13725.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13729.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13733.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13739.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13755.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13764.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 17.86 17.86
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13778.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13788.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13796.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13798.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13800.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13801.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13803.xdti_16f_9t_96_soffqbcka01.xdti_soffqbcka01 7.14 7.14
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13804.xdti_16f_9t_96_soffqbckena01.xdti_soffqbckena01 7.14 7.14

Toggle Coverage for Module : dti_flop_asyn_soffa_top
TotalCoveredPercent
Totals 14 4 28.57
Total Bits 28 9 32.14
Total Bits 0->1 14 5 35.71
Total Bits 1->0 14 4 28.57

Ports 12 2 16.67
Port Bits 24 5 20.83
Port Bits 0->1 12 3 25.00
Port Bits 1->0 12 2 16.67

Signals 2 2 100.00
Signal Bits 4 4 100.00
Signal Bits 0->1 2 2 100.00
Signal Bits 1->0 2 2 100.00

Port Details
NameToggleToggle 1->0Toggle 0->1Direction
VDD No No No INPUT
VSS No No No INPUT
Q No No No OUTPUT
SO No No No OUTPUT
CK Yes Yes Yes INPUT
D Yes Yes Yes INPUT
SD No No Yes INPUT
SE No No No INPUT
RN No No No INPUT
CE No No No INPUT
SN No No No INPUT
notifier No No No INPUT

Signal Details
NameToggleToggle 1->0Toggle 0->1
CE_D Yes Yes Yes
m Yes Yes Yes

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%